Lecture:     Sloan 9  M, W, F 3:10 - 4:00
Lab:           EME56    Open lab - see schedule below

Current Grades

Instructor:  Clint Cole (ccole@eecs.wsu.edu)
                  EME506     (509) 335 1448
                  OH:           M, W 4:00-5:00 or by appt.

OPTIONAL Engineering Digital Design, R. F. Tinder,
TEXT          Academic Press, 2000, ISBN 0-12-691295-5

NEWS

8.25.08 Welcome to Class!

No lab during first week of class. Please buy your Basys or Nexys2 boards from the IEEE office before the first lab.

Be sure to download the Xilinx Webpack software before the first lab: http://www.xilinx.com/ise/logic_design_prod/webpack.htm (you must register first)

Class Schedule and Documents

Teaching Assistants

Lab Assistants

Weekly Schedule

	Monday	Tuesday	Wednesday	Thursday	Friday
8:00
9:00
10:00
11:00
12:00
1:00			EE234 - lab closed
2:00				Session 3 Assistants in Lab	Session 4 LECTURE Assistants in Lab
3:00	LECTURE	Session 1 Assistants in Lab	LECTURE
4:00			Session 2 Assistants in Lab
5:00		EE234 - lab closed			WORK DUE BY 5:00!
6:00

General Class Information

Lecture Format: The class will meet 44 times this semester. Of these meetings, 36 will be used for lecture, 2 for in-class exams, 4 for pre-exam reviews, and 2 for post-exam reviews. Mid-term exams given in class during the 7th and 12th weeks. Questions are encouraged before, during, and after lectures.
Text: TEXT IS OPTIONAL
Grading: Lab work: 40%; homework: 15%; exams: 45%

Links:

Xilinx CAD tools:
http://www.xilinx.com/ise/logic_design_prod/webpack.htm

Digilent Website: www.digilentinc.com 

Laboratory Policies

General: EME56 is an "open" lab, meaning you are free to enter and use the facilities at any time, except when the lab is in use by another class (see schedule above). No food or drink are allowed in the lab. DO NOT LOAD any software on lab computers.
Lab Documents: A lab document (module), exercise, and project are provided for each week. Exercise forms are used to record solutions for homework, and project documents are submitted for each lab project. All submitted projects must be inspected and signed by lab assistant prior to submission. No exercises assigned in the first week or in closed week. Exercises are posted as Word documents so that you can type in responses if desired.
Submission and Grading Policy: Exercises are due by Friday, 5:00pm the week after they are assigned. They must be submitted in the lock box in the lab room. Exercises are accepted up to one week late for a 20% penalty. They will be graded and scores posted the week after submission. Scores posted for two or more weeks cannot be adjusted, so check posted scores and request any adjustments quickly.
Team vs. Individual work: Students are encouraged to discuss problems and solutions with fellow students, lab assistants, and any other sources. However, each student must perform and submit their own work for each lab. Lab assistants are instructed to look for identical or highly similar submissions, and to deduct some or all lab points according to circumstances.
Lab Hardware and Software: The Basys or Nexys2 circuit board from Digilent, Inc. will be used in this class. They are available for purchase from the student IEEE chapter during the first two weeks of class. The WebPack CAD tools distributed by Xilinx will also be used (see link to left). You must first register for an account at the Xilinx site, and then download and install WebPack. Digilent's Adept software (available from the Digilent website) will be used to download designs to the Basys and Nexys2 boards.