MSEE. Washington State University, 2004

Reconfigurable Hardware, Fault-tolerant hardware,  VLSI Design.

D. R. Blum, M. J. Myjak, and J. G. Delgado-Frias, “Enhanced Fault-Tolerant Data Latches for Deep Submicron CMOS,” The 2005 International Conference on Computer Design, pp. 28-34, Las Vegas, June 2005.

M. Myjak, D. Blum, and J. Delgado-Frias, Enhanced fault-tolerant CMOS memory elements, in Proc. 2004 IEEE International Midwest Symposium on Circuits and Systems, Hiroshima, Japan, Jul. 2004.

D. R. Blum and J. G. Delgado-Frias, A Fault-Tolerant Memory-Based Cell for a Reconfigurable DSP Processor, The 2003 International Conference on VLSI (VLSI'03), Las Vegas, Nevada, June 23-26, 2003.

J. G. Delgado-Frias, M. J. Myjak, F. L. Anderson, and D. R. Blum, A Medium-Grain Reconfigurable Cell Array for DSP Applications, IASTED International Conference on Circuits, Signal and Systems (CSS 2003), Cancun, Mexico, pp. 231-236, May 2003. (PDF)